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  rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a wideband, unity-gain stable, fast settling op amp ad841 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 features ac performance unity-gain bandwidth: 40 mhz fast settling: 110 ns to 0.01% slew rate: 300 v/ m s full power bandwidth: 4.7 mhz for 20 v p-p into a 500 v load dc performance input offset voltage: 1 mv max input voltage noise: 13 nv/ ? hz typ open-loop gain: 45 v/mv into a 1 k v load output current: 50 ma min supply current: 12 ma max applications high speed signal conditioning video and pulse amplifiers data acquisition systems line drivers active filters available in 14-pin plastic dip hermetic cerdip, 12-pin to-8 metal can and 20-pin lcc packages chips and mil-std-883b parts available product description the ad841 is a member of the analog devices family of wide bandwidth operational amplifiers. this high speed/high precision family includes, among others, the ad840, which is stable at a gain of 10 or greater, and the ad842, which is stable at a gain of two or greater and has 100 ma minimum output current drive. these devices are fabricated using analog devices junction iso- lated complementary bipolar (cb) process. this process permits a combination of dc precision and wideband ac performance previously unobtainable in a monolithic op amp. in addition to its 40 mhz unity-gain bandwidth product, the ad841 offers ex- tremely fast settling characteristics, typically settling to within 0.01% of final value in 110 ns for a 10 volt step. unlike many high frequency amplifiers, the ad841 requires no external compensation. it remains stable over its full operating temperature range. it also offers a low quiescent current of 12 ma maximum, a minimum output current drive capability of 50 ma, a low input voltage noise of 13 nv/ ? hz and low input offset voltage of 1 mv maximum. the 300 v/ m s slew rate of the ad841, along with its 40 mhz gain bandwidth, ensures excellent performance in video and pulse amplifier applications. this amplifier is well suited for use in high frequency signal conditioning circuits and wide band- width active filters. the extremely rapid settling time of the plastic dip (n) package and cerdip (q) package connection diagrams to-8 (h) package lcc (e) package ad841 makes it the preferred choice for data acquisition applications which require 12-bit accuracy. the ad841 is also appropriate for other applications such as high speed dac and adc buffer amplifiers and other wide bandwidth circuitry. application highlights 1. the high slew rate and fast settling time of the ad841 make it ideal for dac and adc buffers, and all types of video instrumentation circuitry. 2. the ad841 is a precision amplifier. it offers accuracy to 0.01% or better and wide bandwidth performance previ- ously available only in hybrids. 3. the ad841s thermally balanced layout and the speed of the cb process allow the ad841 to settle to 0.01% in 110 ns without the long tails that occur with other fast op amps. 4. laser wafer trimming reduces the input offset voltage to 1 mv max on the k grade, thus eliminating the need for external offset nulling in many applications. offset null pins are provided for additional versatility. 5. the ad841 is an enhanced replacement for the ha2541.
ad841Cspecifications model ad841j ad841k ad841s 1 conditions min typ max min typ max min typ max units input offset voltage 2 0.8 2.0 0.5 1.0 0.5 2.0 mv t min Ct max 5.0 3.3 5.5 mv offset drift 35 35 35 m v/ c input bias current 3.5 8 3.5 5 3.5 8 m a t min Ct max 10 612 m a input offset current 0.1 0.4 0.1 0.2 0.1 0.4 m a t min Ct max 0.5 0.3 0.6 m a input characteristics differential mode input resistance 200 200 200 k w input capacitance 2 2 2 pf input voltage range common mode 6 10 12 6 10 12 6 10 12 v common-mode rejection v cm = 10 v 86 100 103 109 86 110 db t min Ct max 80 100 80 db input voltage noise f = 1 khz 15 15 15 nv/ ? hz wideband noise 10 hz to 10 mhz 47 47 47 m v rms open-loop gain v o = 10 v r load 3 500 w 25 45 25 45 25 45 v/mv t min Ct max 12 20 12 v/mv output characteristics voltage r load 3 500 w t min Ct max 10 10 10 v current v out = 10 v 50 50 50 ma output resistance open loop 5 5 5 w frequency response unity gain bandwidth v out = 90 mv p-p 40 40 40 mhz full power bandwidth 3 v o = 20 v p-p r load 3 500 w 3.1 4.7 3.1 4.7 3.1 4.7 mhz rise time 4 a v = C1 10 10 10 ns overshoot 4 a v = C1 10 10 10 % slew rate 4 a v = C1 200 300 200 300 200 300 v/ m s settling time C 10 v step a v = C1 to 0.1% 90 00 90 ns to 0.01% 110 110 110 ns overdrive recovery Coverdrive 200 200 200 ns +overdrive 700 700 700 ns differential gain f = 4.4 mhz 0.03 0.03 0.03 % differential phase f = 4.4 mhz 0.022 0.022 0.022 degree power supply rated performance 15 15 15 v operating range 5 18 5 18 5 18 v quiescent current 11 12 11 12 11 12 ma t min Ct max 14 14 16 ma power supply rejection ratio v s = 5 v to 18 v 86 100 90 100 86 100 db t min Ct max 80 86 80 db temperature range rated performance 5 0 +75 0 +75 C55 +125 c package options lcc (e-20a) ad841se, ad841se/883b cerdip (q-14) ad841jq ad841kq ad841sq, ad841sq/883b plastic (n-14) ad841jn ad841kn to-8 (h-12) ad841jh ad841kh ad841sh, ad841sh/883b chips ad841j chips ad841s chips notes 1 standard military drawing available: 5962-89641012a C (se/883b); 5962-8964101ca C (sq/883b). 2 input offset voltage specifications are guaranteed after 5 minutes at t a = +25 c. 3 full power bandwidth = slew rate/2 p v peak . 3 refer to figure 19. 4 s grade t min Ct max specifications are tested with automatic test equipment at t a = C55 c and t a = +125 c. all min and max specifications are guaranteed. specifications shown in boldface are tested on all production units. specifications subject to change without notice. rev. b C2C (@ +25 8 c and 6 15 v dc, unless otherwise noted)
ad841 rev. b C3C absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v internal power dissipation 2 to-8 (h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 w plastic (n) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 w cerdip (q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 w input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vs differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . 6 v storage temperature range q, h, e . . . . . . . . . . . . . . . . . . . . . . . . . . C65 c to +150 c n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .C65 c to +125 c junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . +175 c lead temperature range (soldering 60 sec) . . . . . . . . +300 c notes 1 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 maximum internal power dissipation is specified so that t j does not exceed +175 c at an ambient temperature of +25 c. thermal characteristics: q jc q ja q sa cerdip package 35 c/w 110 c/w 38 c/w recommended heat sink: to-8 package 30 c/w 100 c/w 37 c/w aavid engineering? #602b plastic package 30 c/w 100 c/w lcc package 35 c/w 150 c/w metalization photograph contact factory for latest dimensions. dimensions shown in inches and (mm).
figure 1. input common-mode range vs. supply voltage figure 4. quiescent current vs. supply voltage figure 7. quiescent current vs. temperature ad841Ctypical characteristics rev. b C4C (at +25 8 c and v s = 6 15 v, unless otherwise noted) figure 2. output voltage swing vs. supply voltage figure 5. input bias current vs. temperature figure 8. short-circuit current limit vs. temperature figure 3. output voltage swing vs. load resistance figure 6. output impedance vs. frequency figure 9. gain bandwidth product vs. temperature
ad841 rev. b C5C figure 10. open-loop gain and phase margin vs. frequency figure 13. common-mode rejection vs. frequency figure 16. harmonic distortion vs. frequency figure 12. power supply rejection vs. frequency figure 15. output swing and error vs. settling time figure 18. input voltage noise spectral density figure 11. open-loop gain vs. supply voltage figure 14. large signal frequency response figure 17. slew rate vs. temperature
ad841 rev. b C6C input considerations an input resistor (r in in figure 20) is recommended in circuits where the input to the ad841 will be subjected to transient or continuous overload voltages exceeding the 6 v maximum dif- ferential limit. this resistor provides protection for the input transistors by limiting the maximum current that can be forced into the input. for high performance circuits it is recommended that a resistor (r b in figures 19 and 20) be used to reduce bias current errors by matching the impedance at each input. the output voltage error caused by the offset current is more than an order of mag- nitude less than the error present if the bias current error is not removed. ad841 settling time figures 22 and 24 show the settling performance of the ad841 in the test circuit shown in figure 23. settling time is defined as: the interval of time from the application of an ideal step function input until the closed-loop amplifier output has entered and remains within a specified error band. this definition encompasses the major components which com- prise settling time. they include (1) propagation delay through the amplifier; (2) slewing time to approach the final output value; (3) the time of recovery from the overload associated with slewing and (4) linear settling to within the specified error band. figure 19a. inverting amplifier configuration (dip pinout) figure 20a. unity-gain buffer amplifier configuration (dip pinout) figure 19b. inverter large signal pulse response figure 20b. buffer large signal pulse response figure 19c. inverter small signal pulse response figure 20c. buffer small signal pulse response offset nulling the input offset voltage of the ad841 is very low for a high speed op amp, but if additional nulling is required, the circuit shown in figure 21 can be used. figure 21. offset nulling (dip pinout)
figure 22. ad841 0.01% settling time expressed in these terms, the measurement of settling time is obvi- ously a challenge and needs to be done accurately to assure the user that the amplifier is worth consideration for the application. figure 23. settling time test circuit measurement of the ad841s 0.01% settling in 110 ns was ac- complished by amplifying the error signal from a false summing junction with a very high speed proprietary hybrid error ampli- fier specially designed to enable testing of small settling errors. the device under test was driving a 500 w load. the input to the error amp is clamped in order to avoid possible problems as- sociated with the overdrive recovery of the oscilloscope input amplifier. the error amp gains the error from the false summing junction by 10, and it contains a gain vernier to fine trim the gain. figure 24 shows the long term stability of the settling charac- teristics of the ad841 output after a 10 v step. there is no evi- dence of settling tails after the initial transient recovery time. the use of a junction isolated process, together with careful lay- out, avoids these problems by minimizing the effects of transis- tor isolation capacitance discharge and thermally induced shifts in circuit operating points. these problems do not occur even under high output current conditions. applying the ad841 rev. b C7C figure 24. ad841 settling demonstrating no settling tails grounding and bypassing in designing practical circuits with the ad841, the user must remember that whenever high frequencies are involved, some special precautions are in order. circuits must be built with short interconnect leads. large ground planes should be used whenever possible to provide a low resistance, low inductance circuit path, as well as minimizing the effects of high frequency coupling. sockets should be avoided because the increased interlead capacitance can degrade bandwidth. feedback resistors should be of low enough value to assure that the time constant formed with the circuit capacitances will not limit the amplifier performance. resistor values of less than 5 k w are recommended. if a larger resistor must be used, a small (<10 pf) feedback capacitor in parallel with the feedback resistor, r f , may be used to compensate for these stray capaci- tances and optimize the dynamic performance of the amplifier in the particular application. power supply leads should be bypassed to ground as close as possible to the amplifier pins. a 2.2 m f capacitor in parallel with a 0.1 m f ceramic disk capacitor is recommended. capacitive load driving ability like all wideband amplifiers, the ad841 is sensitive to capaci- tive loading. the ad841 is designed to drive capacitive loads of up to 20 pf without degradation of its rated performance. ca- pacitive loads of greater than 20 pf will decrease the dynamic performance of the part although instability should not occur unless the load exceeds 100 pf (for a unity-gain follower). a resistor in series with the output can be used to decouple larger capacitive loads. figure 25 shows a typical configuration for driving a large ca- pacitive load. the 51 w output resistor effectively isolates the high frequency feedback from the load and stabilizes the circuit. low frequency feedback is returned to the amplifier summing junction via the low pass filter formed by the 51 w resistor and the load capacitance, c l .
ad841 rev. b C8C c1242C15C11/88 printed in u.s.a. figure 25. circuit for driving a large capacitive load using a heat sink the ad841 draws less quiescent power than most precision high speed amplifiers and is specified for operation without a heat sink. however, when driving low impedance loads, the cur- rent to the load can be 4 to 5 times the quiescent current. this will create a noticeable temperature rise. improved performance can be achieved by using a small heat sink such as the aavid engineering #602b. terminated line driver the ad841 functions very well as a high speed line driver of ei- ther terminated or unterminated cables. figure 26 shows the ad841 driving a doubly terminated cable in a follower configu- ration. the ad841 maintains a typical slew rate of 300 v/ m s, which means it can drive a 10 v, 4.7 mhz signal or a 3 v, 15.9 mhz signal. the termination resistor, r t , (when equal to the characteristic impedance of the cable) minimizes reflections from the far end of the cable. a back-termination resistor (r bt , also equal to the characteristic impedance of the cable) may be placed between the ad841 output and the cable in order to damp any stray sig- nals caused by a mismatch between r t and the cables charac- teristic impedance. this will result in a cleaner signal, but since 1/2 the output voltage will be dropped across r bt , the op amp must supply double the output signal required if there is no back termination. therefore the full power bandwidth is cut in half. if termination is not used, cables appear as capacitive loads. if this capacitive load is large, it should be decoupled from the ad841 by a resistor in series with the output (see above: driving a capacitive load). figure 26. line driver configuration overdrive recovery figure 27 shows the overdrive recovery capability of the ad841. typical recovery time is 200 ns from negative overdrive and 700 ns from positive overdrive. figure 27. overdrive recovery figure 28. overdrive recovery test circuit e-20a 20-terminal leadless ceramic chip carrier 12-lead metal can package (to-8 style) 14-pin cerdip (q) package 14-pin plastic (n) package outline dimensions dimensions shown in inches and (mm).


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